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Posted: Thursday, February 8, 2018 9:16 AM

Req. ID:
Candidate should have extensive experience in:
RTL coding and simulation in Verilog and/or SystemVerilog
Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure, FPGA design flow process
Design troubleshooting and lab validation with software tools such as Chipscope/Signal Tap and hardware tools like oscilloscopes and logic analyzers
Scripting for test and for automating build tools
Memory interfaces (DDR:SDRAM, SRAM, FLASH)
Experience designing or working with high speed serial IO interfaces. PCI Express experience a plus.
8+ years of experience
Familiarity with board:level hardware design principles
Software (C/C++) coding experience a plus
We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a persons race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran's status, or other classifications protected under law. This includes providing reasonable accommodation for team members disabilities or religious beliefs and practices.
Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.
To request assistance with the application process, Micron's Human Resources Department at (or
Keywords: Seattle Washington (US:WA) United States (US) CNBU (Compute and Networking Business Unit) Experienced Regular Marketing *LI:MP1


• Location: Seattle

• Post ID: 61556322 seattle is an interactive computer service that enables access by multiple users and should not be treated as the publisher or speaker of any information provided by another information content provider. © 2018